Provided by: llvm-4.0_4.0.1-10build1_amd64 bug


       tblgen - Target Description To C++ Code Generator


       tblgen [options] [filename]


       tblgen  translates  from target description (.td) files into C++ code that can be included
       in the definition of an LLVM target library.  Most users of LLVM will not need to use this
       program.  It is only for assisting with writing an LLVM target backend.

       The  input and output of tblgen is beyond the scope of this short introduction; please see
       the introduction to TableGen.

       The filename argument specifies the name of a Target Description (.td)  file  to  read  as


       -help  Print a summary of command line options.

       -o filename
              Specify  the  output  file name.  If filename is -, then tblgen sends its output to
              standard output.

       -I directory
              Specify where to find other target description files for inclusion.  The  directory
              value  should  be  a  full  or  partial  path  to  a directory that contains target
              description files.

       -asmparsernum N
              Make -gen-asm-parser emit assembly writer number N.

       -asmwriternum N
              Make -gen-asm-writer emit assembly writer number N.

       -class className
              Print the enumeration list for this class.

              Print all records to standard output (default).

              Print enumeration values for a class.

              Print expanded sets for testing DAG exprs.

              Generate machine code emitter.

              Generate registers and register classes info.

              Generate instruction descriptions.

              Generate the assembly writer.

              Generate disassembler.

              Generate pseudo instruction lowering.

              Generate a DAG (Directed Acycle Graph) instruction selector.

              Generate assembly instruction matcher.

              Generate DFA Packetizer for VLIW targets.

              Generate a “fast” instruction selector.

              Generate subtarget enumerations.

              Generate intrinsic information.

              Generate target intrinsic information.

              Generate enhanced disassembly info.

              Show the version number of this program.


       If tblgen succeeds, it will exit with 0.  Otherwise, if an error occurs, it will exit with
       a non-zero value.


       Maintained by The LLVM Team (


       2003-2018, LLVM Project