Provided by: libverilog-perl_3.460-1_amd64 bug

NAME

       Verilog::Netlist::PinSelection

DESCRIPTION

       Verilog::Netlist::PinSelection objects are used by Verilog::Netlist::Pin to define ranges
       of nets attached to the respective pin of a cell.

ACCESSORS

       $self->netname
           Name of the respective net, or, if use_pinselects is disabled, the string
           representation of the whole pin value. In the case of a sized constant only the part
           following the ' is stored while the width is encoded in the msb and lsb fields.

       $self->lsb
           Least significent bit of the underlying net within the selection.

       $self->msb
           Most significent bit of the underlying net within the selection.

MEMBER FUNCTIONS

       $self->bracketed_msb_lsb
           Returns the common string representation of a vectored net, e.g. netA[15:8].

DISTRIBUTION

       Verilog-Perl is part of the <http://www.veripool.org/> free Verilog EDA software tool
       suite.  The latest version is available from CPAN and from
       <http://www.veripool.org/verilog-perl>.

       Copyright 2000-2019 by Wilson Snyder.  This package is free software; you can redistribute
       it and/or modify it under the terms of either the GNU Lesser General Public License
       Version 3 or the Perl Artistic License Version 2.0.

AUTHORS

       Stefan Tauner <tauner@technikum-wien.at> Wilson Snyder <wsnyder@wsnyder.org>

       # =head1 SEE ALSO

       # Verilog-Perl, # Verilog::Netlist # Verilog::Netlist::Pin