Provided by: lmbench_3.0-a9-1.1_amd64 bug

NAME

       cache - cache parameters

SYNOPSIS

       cache [ -L <line size> ] [ -M <len> ] [ -W <warmups> ] [ -N <repetitions> ]

DESCRIPTION

       cache  tries  to  determine  the  characteristics of the memory hierarchy.  It attempts to
       determine the number of caches, the size of each cache, the line size for each cache,  and
       the  available  memory  parallelism  at  each  level in the memory hierarchy.  The largest
       amount of memory it will examine is len bytes.

       cache first attempts to determine the number and size of caches by  measuring  the  memory
       latency  for  various  memory  sizes.   Once  it has identified the various caches it then
       measures  the  latency,  parallelism,  and  line  size  for  each  cache.   Unfortunately,
       determining  the cache size merely from latency is exceedingly difficult due to variations
       in cache replacement and prefetching strategies.

BUGS

       cache is an experimental benchmark and is known to fail on many processors.  In particular
       there  are  a  large number of machines with weird caching behavior that confuse cache and
       prevent it from accurately determining the number and size of the various caches.

SEE ALSO

       lmbench(8), line(8), tlb(8), par_mem(8).

AUTHOR

       Carl Staelin and Larry McVoy

       Comments, suggestions, and bug reports are always welcome.

(c)2000 Carl Staelin and Larry McVoy          $Date$                                     CACHE(8)