Provided by: libck-dev_0.6.0-1_amd64
NAME
ck_pr_fence_store_atomic — enforce ordering of store operations to load operations
LIBRARY
Concurrency Kit (libck, -lck)
SYNOPSIS
#include <ck_pr.h> void ck_pr_fence_store_atomic(void); void ck_pr_fence_strict_store_atomic(void);
DESCRIPTION
The ck_pr_fence_store_atomic() function enforces the ordering of any memory store, ck_pr_store() and atomic read-modify-write operations to atomic read-modify-write operations relative to the invocation of the function. This function always serve as an implicit compiler barrier. This functions will emit a fence for PSO and RMO targets. In order to force the emission of a fence use the ck_pr_fence_strict_store_atomic() function.
EXAMPLE
#include <ck_pr.h> static int a = 0; static int b = 0; void function(void) { ck_pr_store_int(&a, 1); /* * Guarantee that the store to a is completed * with respect to the update of b. */ ck_pr_fence_store_atomic(); ck_pr_add_int(&b, 2); return; }
RETURN VALUES
This function has no return value.
SEE ALSO
ck_pr_stall(3), ck_pr_fence_atomic(3), ck_pr_fence_atomic_store(3), ck_pr_fence_atomic_load(3), ck_pr_fence_load(3), ck_pr_fence_load_atomic(3), ck_pr_fence_load_store(3), ck_pr_fence_load_depends(3), ck_pr_fence_store(3), ck_pr_fence_store_load(3), ck_pr_fence_memory(3), ck_pr_barrier(3), ck_pr_fas(3), ck_pr_load(3), ck_pr_store(3), ck_pr_faa(3), ck_pr_inc(3), ck_pr_dec(3), ck_pr_neg(3), ck_pr_not(3), ck_pr_add(3), ck_pr_sub(3), ck_pr_and(3), ck_pr_or(3), ck_pr_xor(3), ck_pr_cas(3), ck_pr_btc(3), ck_pr_bts(3), ck_pr_btr(3) Additional information available at http://concurrencykit.org/ May 18, 2013