NAME

       rfnoc_image_builder - Build UHD image using RFNoC blocks.

USAGE

       rfnoc_image_builder [-h] (-y YAML_CONFIG | -r GRC_CONFIG) [-F FPGA_DIR]

       [-o IMAGE_CORE_OUTPUT] [-x ROUTER_HEX_OUTPUT]
              [-I  INCLUDE_DIR]  [-b GRC_BLOCKS] [-l LOG_LEVEL] [--generate-only] [-d DEVICE] [-t
              TARGET] [-g] [-c]

   optional arguments:
       -h, --help
              show this help message and exit

       -y YAML_CONFIG, --yaml-config YAML_CONFIG
              Path to yml configuration file

       -r GRC_CONFIG, --grc-config GRC_CONFIG
              Path to grc file to generate config from

       -F FPGA_DIR, --fpga-dir FPGA_DIR
              Path to directory for the FPGA source tree.Defaults to the FPGA source tree of  the
              current repo.

       -o IMAGE_CORE_OUTPUT, --image-core-output IMAGE_CORE_OUTPUT
              Path  to where to save the image core Verilog source.  Defaults to the directory of
              the YAML file, filename <DEVICE>_rfnoc_image_core.v

       -x ROUTER_HEX_OUTPUT, --router-hex-output ROUTER_HEX_OUTPUT
              Path to where to save the static router hex file.  Defaults to the directory of the
              YAML file, filename <DEVICE>_static_router.hex

       -I INCLUDE_DIR, --include-dir INCLUDE_DIR
              Path directory of the RFNoC Out-of-Tree module

       -b GRC_BLOCKS, --grc-blocks GRC_BLOCKS
              Path directory of GRC block descriptions (needed for --grc-config only)

       -l LOG_LEVEL, --log-level LOG_LEVEL
              Adjust log level

       --generate-only
              Just generate files without building IP

       -d DEVICE, --device DEVICE
              Device  to  be  programmed  [x300,  x310, e310, e320, n300, n310, n320].Needs to be
              specified either here, or in the configuration file.

       -t TARGET, --target TARGET
              Build target (e.g. X310_HG, N320_XG, ...). Needs to be specified  either  here,  on
              the configuration file.

       -g, --GUI
              Open Vivado GUI during the FPGA building process

       -c, --clean-all
              Cleans the IP before a new build

       [-o IMAGE_CORE_OUTPUT] [-x ROUTER_HEX_OUTPUT]
              [-I  INCLUDE_DIR]  [-b GRC_BLOCKS] [-l LOG_LEVEL] [--generate-only] [-d DEVICE] [-t
              TARGET] [-g] [-c]

SEE ALSO

       UHD documentation: https://files.ettus.com/manual/

       Other UHD programs:

       uhd_cal_tx_dc_offset(1)         uhd_cal_rx_iq_balance(1)          uhd_images_downloader(1)
       uhd_config_info(1) uhd_find_devices(1)

AUTHOR

       This  manual  page was written by Maitland Bottoms for the Debian project (but may be used
       by others).

COPYRIGHT

       Copyright (c) 2020 Ettus Research LLC

       This program is free software: you can redistribute it and/or modify it under the terms of
       the  GNU  General  Public  License  as  published  by the Free Software Foundation, either
       version 3 of the License, or (at your option) any later version.

       This program is distributed in the hope that it will be useful, but WITHOUT ANY  WARRANTY;
       without  even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
       See the GNU General Public License for more details.