NAME

     altera_jtag_uart — driver for the Altera JTAG UART Core

SYNOPSIS

     device altera_jtag_uart

     In /boot/device.hints:
     hint.altera_jtag_uart.0.at="nexus0"
     hint.altera_jtag_uart.0.maddr=0x7f000000
     hint.altera_jtag_uart.0.msize=0x40
     hint.altera_jtag_uart.0.irq=0
     hint.altera_jtag_uart.1.at="nexus0"
     hint.altera_jtag_uart.1.maddr=0x7f001000
     hint.altera_jtag_uart.1.msize=0x40

DESCRIPTION

     The altera_jtag_uart device driver provides support for the Altera JTAG UART core, which
     allows multiple UART-like streams to be carried over JTAG.  altera_jtag_uart allows JTAG
     UART streams to be attached to both the low-level console interface, used for direct kernel
     input and output, and the tty(4) layer, to be used with ttys(5) and login(1).  Sequential
     Altera JTAG UART devices will appear as ttyu0, ttyu1, etc.

HARDWARE

     Altera JTAG UART devices can be connected to using Altera's nios2-terminal program, with the
     instance selected using the --instance argument on the management host.  altera_jtag_uart
     supports JTAG UART cores with or without interrupt lines connected; if the irq portion of
     the device.hints entry is omitted, the driver will poll rather than configure interrupts.

SEE ALSO

     login(1), tty(4), ttys(5)

     Altera Embedded Peripherals IP User Guide, Altera Corporation,
     http://www.altera.com/literature/ug/ug_embedded_ip.pdf, June 2011.

HISTORY

     The altera_jtag_uart device driver first appeared in FreeBSD 10.0.

AUTHORS

     The altera_jtag_uart device driver and this manual page were developed by SRI International
     and the University of Cambridge Computer Laboratory under DARPA/AFRL contract
     (FA8750-10-C-0237) (“CTSRD”), as part of the DARPA CRASH research programme.  This device
     driver was written by Robert N. M. Watson.

BUGS

     altera_jtag_uart must dynamically poll to detect when JTAG is present, in order to disable
     flow control in the event that there is no receiving endpoint.  Otherwise, the boot may hang
     waiting for the JTAG client to be attached, and user processes attached to JTAG UART devices
     might block indefinitely.  However, there is no way to flush the output buffer once JTAG is
     detected to have disappeared; this means that a small amount of stale output data will
     remain in the output buffer, being displayed by nios2-terminal when it is connected.  Loss
     of JTAG will not generate a hang-up event, as that is rarely the desired behaviour.

     nios2-terminal does not place the client-side TTY in raw mode, and so by default will not
     pass all control characters through to the UART.