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     ahc — Adaptec VL/ISA/PCI SCSI host adapter driver


     To compile this driver into the kernel, place the following lines in your kernel
     configuration file:

           device scbus
           device ahc

           For one or more PCI cards:
           device pci

           To allow PCI adapters to use memory mapped I/O if enabled:
           options AHC_ALLOW_MEMIO

           To configure one or more controllers to assume the target role:
           options AHC_TMODE_ENABLE <bitmask of units>

     Alternatively, to load the driver as a module at boot time, place the following lines in



     This driver provides access to the SCSI bus(es) connected to the Adaptec AIC77xx and AIC78xx
     host adapter chips.

     Driver features include support for twin and wide busses, fast, ultra or ultra2 synchronous
     transfers depending on controller type, tagged queueing, SCB paging, and target mode.

     Memory mapped I/O can be enabled for PCI devices with the “AHC_ALLOW_MEMIO” configuration
     option.  Memory mapped I/O is more efficient than the alternative, programmed I/O.  Most PCI
     BIOSes will map devices so that either technique for communicating with the card is
     available.  In some cases, usually when the PCI device is sitting behind a PCI->PCI bridge,
     the BIOS may fail to properly initialize the chip for memory mapped I/O.  The typical
     symptom of this problem is a system hang if memory mapped I/O is attempted.  Most modern
     motherboards perform the initialization correctly and work fine with this option enabled.

     Individual controllers may be configured to operate in the target role through the
     “AHC_TMODE_ENABLE” configuration option.  The value assigned to this option should be a
     bitmap of all units where target mode is desired.  For example, a value of 0x25, would
     enable target mode on units 0, 2, and 5.  A value of 0x8a enables it for units 1, 3, and 7.

     Per target configuration performed in the SCSI-Select menu, accessible at boot is honored by
     this driver.  This includes synchronous/asynchronous transfers, maximum synchronous
     negotiation rate, wide transfers, disconnection, the host adapter's SCSI ID.  For systems
     that store non-volatile settings in a system specific manner rather than a serial eeprom
     directly connected to the aic7xxx controller, the BIOS must be enabled for the driver to
     access this information.  This restriction applies to many chip-down motherboard

     Performance and feature sets vary throughout the aic7xxx product line.  The following table
     provides a comparison of the different chips supported by the ahc driver.  Note that wide
     and twin channel features, although always supported by a particular chip, may be disabled
     in a particular motherboard or card design.

           Chip      MIPS  Bus     MaxSync  MaxWidth  SCBs  Features
           aic7770   10    VL      10MHz    16Bit     4     1
           aic7850   10    PCI/32  10MHz    8Bit      3
           aic7860   10    PCI/32  20MHz    8Bit      3
           aic7870   10    PCI/32  10MHz    16Bit     16
           aic7880   10    PCI/32  20MHz    16Bit     16
           aic7890   20    PCI/32  40MHz    16Bit     16    3 4 5 6 7 8
           aic7891   20    PCI/64  40MHz    16Bit     16    3 4 5 6 7 8
           aic7892   20    PCI/64  80MHz    16Bit     16    3 4 5 6 7 8
           aic7895   15    PCI/32  20MHz    16Bit     16    2 3 4 5
           aic7895C  15    PCI/32  20MHz    16Bit     16    2 3 4 5 8
           aic7896   20    PCI/32  40MHz    16Bit     16    2 3 4 5 6 7 8
           aic7897   20    PCI/64  40MHz    16Bit     16    2 3 4 5 6 7 8
           aic7899   20    PCI/64  80MHz    16Bit     16    2 3 4 5 6 7 8

           1.   Multiplexed Twin Channel Device - One controller servicing two busses.
           2.   Multi-function Twin Channel Device - Two controllers on one chip.
           3.   Command Channel Secondary DMA Engine - Allows scatter gather list and SCB
           4.   64 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA.
           5.   Block Move Instruction Support - Doubles the speed of certain sequencer
           6.   ‘Bayonet’ style Scatter Gather Engine - Improves S/G prefetch performance.
           7.   Queuing Registers - Allows queueing of new transactions without pausing the
           8.   Multiple Target IDs - Allows the controller to respond to selection as a target
                on multiple SCSI IDs.


     The ahc driver supports the following SCSI host adapter chips and SCSI controller cards:

        Adaptec AIC7770 host adapter chip
        Adaptec AIC7850 host adapter chip
        Adaptec AIC7860 host adapter chip
        Adaptec AIC7870 host adapter chip
        Adaptec AIC7880 host adapter chip
        Adaptec AIC7890 host adapter chip
        Adaptec AIC7891 host adapter chip
        Adaptec AIC7892 host adapter chip
        Adaptec AIC7895 host adapter chip
        Adaptec AIC7896 host adapter chip
        Adaptec AIC7897 host adapter chip
        Adaptec AIC7899 host adapter chip
        Adaptec 274X(W)
        Adaptec 274X(T)
        Adaptec 2910
        Adaptec 2915
        Adaptec 2920C
        Adaptec 2930C
        Adaptec 2930U2
        Adaptec 2940
        Adaptec 2940J
        Adaptec 2940N
        Adaptec 2940U
        Adaptec 2940AU
        Adaptec 2940UW
        Adaptec 2940UW Dual
        Adaptec 2940UW Pro
        Adaptec 2940U2W
        Adaptec 2940U2B
        Adaptec 2950U2W
        Adaptec 2950U2B
        Adaptec 19160B
        Adaptec 29160B
        Adaptec 29160N
        Adaptec 3940
        Adaptec 3940U
        Adaptec 3940AU
        Adaptec 3940UW
        Adaptec 3940AUW
        Adaptec 3940U2W
        Adaptec 3950U2
        Adaptec 3960
        Adaptec 39160
        Adaptec 3985
        Adaptec 4944UW
        Many motherboards with on-board SCSI support


     Every transaction sent to a device on the SCSI bus is assigned a ‘SCSI Control Block’ (SCB).
     The SCB contains all of the information required by the controller to process a transaction.
     The chip feature table lists the number of SCBs that can be stored in on-chip memory.  All
     chips with model numbers greater than or equal to 7870 allow for the on chip SCB space to be
     augmented with external SRAM up to a maximum of 255 SCBs.  Very few Adaptec controller
     configurations have external SRAM.

     If external SRAM is not available, SCBs are a limited resource.  Using the SCBs in a
     straight forward manner would only allow the driver to handle as many concurrent
     transactions as there are physical SCBs.  To fully utilize the SCSI bus and the devices on
     it, requires much more concurrency.  The solution to this problem is SCB Paging, a concept
     similar to memory paging.  SCB paging takes advantage of the fact that devices usually
     disconnect from the SCSI bus for long periods of time without talking to the controller.
     The SCBs for disconnected transactions are only of use to the controller when the transfer
     is resumed.  When the host queues another transaction for the controller to execute, the
     controller firmware will use a free SCB if one is available.  Otherwise, the state of the
     most recently disconnected (and therefore most likely to stay disconnected) SCB is saved,
     via dma, to host memory, and the local SCB reused to start the new transaction.  This allows
     the controller to queue up to 255 transactions regardless of the amount of SCB space.  Since
     the local SCB space serves as a cache for disconnected transactions, the more SCB space
     available, the less host bus traffic consumed saving and restoring SCB data.


     aha(4), ahd(4), cd(4), da(4), sa(4), scsi(4)


     The ahc driver appeared in FreeBSD 2.0.


     The ahc driver, the AIC7xxx sequencer-code assembler, and the firmware running on the
     aic7xxx chips was written by Justin T. Gibbs.


     Some Quantum drives (at least the Empire 2100 and 1080s) will not run on an AIC7870 Rev B in
     synchronous mode at 10MHz.  Controllers with this problem have a 42 MHz clock crystal on
     them and run slightly above 10MHz.  This confuses the drive and hangs the bus.  Setting a
     maximum synchronous negotiation rate of 8MHz in the SCSI-Select utility will allow normal

     Although the Ultra2 and Ultra160 products have sufficient instruction ram space to support
     both the initiator and target roles concurrently, this configuration is disabled in favor of
     allowing the target role to respond on multiple target ids.  A method for configuring dual
     role mode should be provided.

     Tagged Queuing is not supported in target mode.

     Reselection in target mode fails to function correctly on all high voltage differential
     boards as shipped by Adaptec.  Information on how to modify HVD board to work correctly in
     target mode is available from Adaptec.