NAME

       hm2_7i43  -  LinuxCNC  HAL driver for the Mesa Electronics 7i43 EPP Anything IO board with
       HostMot2 firmware.

SYNOPSIS

       loadrt     hm2_7i43     [ioaddr=N[,N...]]     [ioaddr_hi=N[,N...]]     [epp_wide=N[,N...]]
              [config="str[,str...]"] [debug_epp=N[,N...]]

           ioaddr [default: 0 (parport0)]
                  The base address of the parallel port.

                  The number of ioaddr indexes/addresses given is used by the driver to determine
                  how many boards to search for.

           ioaddr_hi [default: 0]
                  The secondary address of the parallel port, used to set EPP mode.  0  means  to
                  use ioaddr + 0x400.

           epp_wide [default: 1]
                  Set  to  zero  to  disable  the  "wide EPP mode".  "Wide" mode allows a 16- and
                  32-bit EPP transfers, which can reduce the time spent in  the  read  and  write
                  functions.  However, this may not work on all EPP parallel ports.

           config [default: ""]
                  HostMot2 config strings, described in the hostmot2(9) manpage.

           debug_epp [default: 0]
                  Developer/debug use only!  Enable debug logging of most EPP transfers.

DESCRIPTION

       hm2_7i43 is a device driver that interfaces the Mesa 7i43 board with the HostMot2 firmware
       to the LinuxCNC HAL.  Both the 200K and the 400K FPGAs are supported.

       The driver talks with the 7i43 over the parallel port, not over USB.  USB can be  used  to
       power  the  7i43,  but  not  to  talk  to it.  USB communication with the 7i43 will not be
       supported any time soon, since USB has poor real-time qualities.

       The driver programs the board's FPGA with firmware when it registers the  board  with  the
       hostmot2  driver.   The firmware to load is specified in the config modparam, as described
       in the hostmot2(9) manpage, in the config modparam section.

Jumper settings

       To send the FPGA configuration from the PC, the  board  must  be  configured  to  get  its
       firmware  from  the  EPP port.  To do this, jumpers W4 and W5 must both be down, ie toward
       the USB connector.

       The board must be configured to power on whether or not the USB interface is active.  This
       is done by setting jumper W7 up, ie away from the edge of the board.

Communicating with the board

       The  7i43  communicates  with  the LinuxCNC computer over EPP, the Enhanced Parallel Port.
       This provides  about  1  MBps  of  throughput,  and  the  communication  latency  is  very
       predictable and reasonably low.

       The parallel port must support EPP 1.7 or EPP 1.9.  EPP 1.9 is preferred, but EPP 1.7 will
       work too.  The EPP mode of the parallel port is sometimes a setting in the BIOS.

       Note that the popular "NetMOS" aka "MosChip 9805" PCI parport cards do not work.  They  do
       not  meet  the  EPP  spec,  and  cannot  be reliably used with the 7i43.  You have to find
       another card, sorry.

       EPP is very reliable under normal circumstances,  but  bad  cabling  or  excessively  long
       cabling  runs  may  cause  communication  timeouts.   The driver exports a parameter named
       hm2_7i43.<BoardNum>.io_error to inform HAL of this condition.  When the driver detects  an
       EPP  timeout,  it  sets  io_error  to  True  and  stops communicating with the 7i43 board.
       Setting io_error back to False makes the driver start trying to communicate with the  7i43
       again.

       Access to the EPP bus is not threadsafe: only one realtime thread may access the EPP bus.

SEE ALSO

       hostmot2(9)

LICENSE

       GPL