Provided by: graywolf_0.1.6-4build1_amd64 bug

NAME

       graywolf - placement tool for digital VLSI design

SYNOPSIS

       graywolf [options] designName [windowId] [flowdirectory]

DESCRIPTION

       This  is  a utility used to perform placement of digital VLSI designs. It is based on some
       code from the early 90s and it is one of the building blocks  of  the  open  source  qflow
       digital design flow.

OPTIONS

       -n     no graphics

       -d     prints debug info and performs extensive error checking

       -g     general mode

       -p     pick mode

       -w     parasite mode will inherit a window

USAGE

       Typically,  you  would  be in a directory with a [DESIGN].cel file and a [DESIGN].par file
       and then run:

          graywolf [DESIGN]

       where [DESIGN] is the file name of the design. More information about the input and output
       files is found below.

       However,  it  is  recommended  to  use  the  qflow  digital design flow instead of running
       graywolf directly. qflow prepares the input files from standardized  files,  and  converts
       the output to standardized files.

INPUT

       Two  input  files  are necessary to run graywolf. A .cel file containing the design, and a
       .par file containing the parameters which define the technology.  The  .cel  file  may  be
       created from a .blif design file and a .lef library file with the script "blif2cel.tcl" in
       the qflow package.

OUTPUT

       The main output from graywolf is a .pl1 file containing the layout of the design. This may
       be  converted to a .def file using the script "place2def.tcl" in the qflow package. A .def
       file is a standardized description of a layout.

SEE ALSO

       qflow(1)

AUTHOR

       This manual page was written by Ruben Undheim  <ruben.undheim@gmail.com>  for  the  Debian
       project (and may be used by others).

                                         11 October 2015                              GRAYWOLF(1)