NAME

       vppreproc - Preprocess Verilog code using verilog-perl

SYNOPSIS

         vppreproc --help
         vppreproc [verilog_options] [-o filename] [verilog_files.v...]

DESCRIPTION

       Vppreproc reads the Verilog files passed on the command line and outputs preprocessed
       output to standard out or the filename passed with -o.

       Note vppreproc was named vppp until release 3.100, so if you're looking for vppp, this is
       the right replacement.  The vppp name conflicted with another non-Verilog related tool.

VERILOG ARGUMENTS

       The following arguments are compatible with GCC, VCS and most Verilog programs.

       +define+var+value =item -Dvar=value
           Defines the given preprocessor symbol.

       -f file
           Read the specified file, and act as if all text inside it was specified as command
           line parameters.

       -f file
           Read the specified file, and act as if all text inside it was specified as command
           line parameters.  Any relative paths are relative to the current directory.

       +incdir+dir =item -Idir
           Add the directory to the list of directories that should be searched for include
           directories or libraries.

       +libext+ext+ext...
           Specify the extensions that should be used for finding modules.  If for example module
           x is referenced, look in x.ext.

       -y dir
           Add the directory to the list of directories that should be searched for include
           directories or libraries.

VPPREPROC ARGUMENTS

       --help
           Displays this message and program version and exits.

       --o file
           Use the given filename for output instead of stdout.

       --dump-defines
           Suppress normal output, and instead print a list of all defines existing at the end of
           processing the input file.

       --noblank
           Removes empty lines from the output.  Should be used with --noline, as if correct line
           numbers are needed, blank lines must be preserved for proper accounting by the program
           reading the output of vppreproc.

       --nocomment
           Remove comments.

       --noline
           Remove `line directives.

       -P  Same as --noline --noblank, similar to "GCC -P" behavior.

       --pedantic
           Rigorously obey the Verilog spec.  This disables the `error feature, and may disable
           other features that are not specified in the approved language reference manual.
           Defaults false.

       --simple
           Requests simple output, an alias for --noline, --nocomment and --noblank.

       --synthesis
           Define SYNTHESIS, and ignore text between "ambit", "pragma", "synopsys" or "synthesis"
           translate_off and translate_on meta comments.  Note using metacomments is discouraged
           as they have led to silicon bugs (versus ifdef SYNTHESIS); see
           <https://www.veripool.org/papers/TenIPEdits_SNUGBos07_paper.pdf>.

       --version
           Displays program version and exits.

LANGUAGE EXTENSIONS

       Vppreproc supports the preprocessing constructs defined in the Verilog 2001 and
       SystemVerilog 2005 standards.

       The following additional constructs may be added to your Verilog code.

       `__FILE__
           The __FILE__ define expands to the current filename as a string, like C++'s __FILE__.
           This was incorporated into to the 1800-2009 standard (but supported by Verilog-Perl
           since 2004!)

       `__LINE__
           The __LINE__ define expands to the current filename as a string, like C++'s __LINE__.
           This was incorporated into to the 1800-2009 standard (but supported by Verilog-Perl
           since 2004!)

       `error string
           This will report an error when encountered, like C++'s #error.

DISTRIBUTION

       Verilog-Perl is part of the <https://www.veripool.org/> free Verilog EDA software tool
       suite.  The latest version is available from CPAN and from
       <https://www.veripool.org/verilog-perl>.

       Copyright 2000-2022 by Wilson Snyder.  This package is free software; you can redistribute
       it and/or modify it under the terms of either the GNU Lesser General Public License
       Version 3 or the Perl Artistic License Version 2.0.

AUTHORS

       Wilson Snyder <wsnyder@wsnyder.org>

SEE ALSO

       Verilog-Perl, Verilog::Getopt, Verilog::Preproc