Provided by: avr-libc_2.0.0+Atmel3.7.0-1_all
NAME
util_twi - <util/twi.h>: TWI bit mask definitions
SYNOPSIS
TWSR values Mnemonics: TW_MT_xxx - master transmitter TW_MR_xxx - master receiver TW_ST_xxx - slave transmitter TW_SR_xxx - slave receiver #define TW_START 0x08 #define TW_REP_START 0x10 #define TW_MT_SLA_ACK 0x18 #define TW_MT_SLA_NACK 0x20 #define TW_MT_DATA_ACK 0x28 #define TW_MT_DATA_NACK 0x30 #define TW_MT_ARB_LOST 0x38 #define TW_MR_ARB_LOST 0x38 #define TW_MR_SLA_ACK 0x40 #define TW_MR_SLA_NACK 0x48 #define TW_MR_DATA_ACK 0x50 #define TW_MR_DATA_NACK 0x58 #define TW_ST_SLA_ACK 0xA8 #define TW_ST_ARB_LOST_SLA_ACK 0xB0 #define TW_ST_DATA_ACK 0xB8 #define TW_ST_DATA_NACK 0xC0 #define TW_ST_LAST_DATA 0xC8 #define TW_SR_SLA_ACK 0x60 #define TW_SR_ARB_LOST_SLA_ACK 0x68 #define TW_SR_GCALL_ACK 0x70 #define TW_SR_ARB_LOST_GCALL_ACK 0x78 #define TW_SR_DATA_ACK 0x80 #define TW_SR_DATA_NACK 0x88 #define TW_SR_GCALL_DATA_ACK 0x90 #define TW_SR_GCALL_DATA_NACK 0x98 #define TW_SR_STOP 0xA0 #define TW_NO_INFO 0xF8 #define TW_BUS_ERROR 0x00 #define TW_STATUS_MASK #define TW_STATUS (TWSR & TW_STATUS_MASK) R/~W bit in SLA+R/W address field. #define TW_READ 1 #define TW_WRITE 0
Detailed Description
#include <util/twi.h> This header file contains bit mask definitions for use with the AVR TWI interface.
Macro Definition Documentation
#define TW_BUS_ERROR 0x00 illegal start or stop condition #define TW_MR_ARB_LOST 0x38 arbitration lost in SLA+R or NACK #define TW_MR_DATA_ACK 0x50 data received, ACK returned #define TW_MR_DATA_NACK 0x58 data received, NACK returned #define TW_MR_SLA_ACK 0x40 SLA+R transmitted, ACK received #define TW_MR_SLA_NACK 0x48 SLA+R transmitted, NACK received #define TW_MT_ARB_LOST 0x38 arbitration lost in SLA+W or data #define TW_MT_DATA_ACK 0x28 data transmitted, ACK received #define TW_MT_DATA_NACK 0x30 data transmitted, NACK received #define TW_MT_SLA_ACK 0x18 SLA+W transmitted, ACK received #define TW_MT_SLA_NACK 0x20 SLA+W transmitted, NACK received #define TW_NO_INFO 0xF8 no state information available #define TW_READ 1 SLA+R address #define TW_REP_START 0x10 repeated start condition transmitted #define TW_SR_ARB_LOST_GCALL_ACK 0x78 arbitration lost in SLA+RW, general call received, ACK returned #define TW_SR_ARB_LOST_SLA_ACK 0x68 arbitration lost in SLA+RW, SLA+W received, ACK returned #define TW_SR_DATA_ACK 0x80 data received, ACK returned #define TW_SR_DATA_NACK 0x88 data received, NACK returned #define TW_SR_GCALL_ACK 0x70 general call received, ACK returned #define TW_SR_GCALL_DATA_ACK 0x90 general call data received, ACK returned #define TW_SR_GCALL_DATA_NACK 0x98 general call data received, NACK returned #define TW_SR_SLA_ACK 0x60 SLA+W received, ACK returned #define TW_SR_STOP 0xA0 stop or repeated start condition received while selected #define TW_ST_ARB_LOST_SLA_ACK 0xB0 arbitration lost in SLA+RW, SLA+R received, ACK returned #define TW_ST_DATA_ACK 0xB8 data transmitted, ACK received #define TW_ST_DATA_NACK 0xC0 data transmitted, NACK received #define TW_ST_LAST_DATA 0xC8 last data byte transmitted, ACK received #define TW_ST_SLA_ACK 0xA8 SLA+R received, ACK returned #define TW_START 0x08 start condition transmitted #define TW_STATUS (TWSR & TW_STATUS_MASK) TWSR, masked by TW_STATUS_MASK #define TW_STATUS_MASK Value:.PP (_BV(TWS7)|_BV(TWS6)|_BV(TWS5)|_BV(TWS4)|\ _BV(TWS3)) The lower 3 bits of TWSR are reserved on the ATmega163. The 2 LSB carry the prescaler bits on the newer ATmegas. #define TW_WRITE 0 SLA+W address
Author
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