Provided by: avr-libc_1.8.0-4.1_all 
NAME
boot.h -
SYNOPSIS
Macros
#define BOOTLOADER_SECTION __attribute__ ((section ('.bootloader')))
#define __COMMON_ASB RWWSB
#define __COMMON_ASRE RWWSRE
#define BLB12 5
#define BLB11 4
#define BLB02 3
#define BLB01 2
#define boot_spm_interrupt_enable() (__SPM_REG |= (uint8_t)_BV(SPMIE))
#define boot_spm_interrupt_disable() (__SPM_REG &= (uint8_t)~_BV(SPMIE))
#define boot_is_spm_interrupt() (__SPM_REG & (uint8_t)_BV(SPMIE))
#define boot_rww_busy() (__SPM_REG & (uint8_t)_BV(__COMMON_ASB))
#define boot_spm_busy() (__SPM_REG & (uint8_t)_BV(__SPM_ENABLE))
#define boot_spm_busy_wait() do{}while(boot_spm_busy())
#define __BOOT_PAGE_ERASE (_BV(__SPM_ENABLE) | _BV(PGERS))
#define __BOOT_PAGE_WRITE (_BV(__SPM_ENABLE) | _BV(PGWRT))
#define __BOOT_PAGE_FILL _BV(__SPM_ENABLE)
#define __BOOT_RWW_ENABLE (_BV(__SPM_ENABLE) | _BV(__COMMON_ASRE))
#define __boot_page_fill_normal(address, data)
#define __boot_page_fill_alternate(address, data)
#define __boot_page_fill_extended(address, data)
#define __boot_page_erase_normal(address)
#define __boot_page_erase_alternate(address)
#define __boot_page_erase_extended(address)
#define __boot_page_write_normal(address)
#define __boot_page_write_alternate(address)
#define __boot_page_write_extended(address)
#define __boot_rww_enable()
#define __boot_rww_enable_alternate()
#define __boot_lock_bits_set(lock_bits)
#define __boot_lock_bits_set_alternate(lock_bits)
#define GET_LOW_FUSE_BITS (0x0000)
#define GET_LOCK_BITS (0x0001)
#define GET_EXTENDED_FUSE_BITS (0x0002)
#define GET_HIGH_FUSE_BITS (0x0003)
#define boot_lock_fuse_bits_get(address)
#define __BOOT_SIGROW_READ (_BV(__SPM_ENABLE) | _BV(SIGRD))
#define boot_signature_byte_get(addr)
#define boot_page_fill(address, data) __boot_page_fill_normal(address, data)
#define boot_page_erase(address) __boot_page_erase_normal(address)
#define boot_page_write(address) __boot_page_write_normal(address)
#define boot_rww_enable() __boot_rww_enable()
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set(lock_bits)
#define boot_page_fill_safe(address, data)
#define boot_page_erase_safe(address)
#define boot_page_write_safe(address)
#define boot_rww_enable_safe()
#define boot_lock_bits_set_safe(lock_bits)
Macro Definition Documentation
#define __boot_lock_bits_set(lock_bits)
Value:
(__extension__({ \
uint8_t value = (uint8_t)(~(lock_bits)); __asm__ __volatile__ ( "ldi r30, 1" "ldi r31, 0" "mov r0, %2" "sts %0, %1" "spm" : : "i" (_SFR_MEM_ADDR(__SPM_REG)), "r" ((uint8_t)(__BOOT_LOCK_BITS_SET)), "r" (value) : "r0", "r30", "r31" ); }))
#define __boot_lock_bits_set_alternate(lock_bits)
Value:
(__extension__({ \
uint8_t value = (uint8_t)(~(lock_bits)); __asm__ __volatile__ ( "ldi r30, 1" "ldi r31, 0" "mov r0, %2" "sts %0, %1" "spm" ".word 0xffff" "nop" : : "i" (_SFR_MEM_ADDR(__SPM_REG)), "r" ((uint8_t)(__BOOT_LOCK_BITS_SET)), "r" (value) : "r0", "r30", "r31" ); }))
#define __boot_page_erase_alternate(address)
Value:
(__extension__({ __asm__ __volatile__ ( "sts %0, %1" "spm" ".word 0xffff" "nop" : : "i" (_SFR_MEM_ADDR(__SPM_REG)), "r" ((uint8_t)(__BOOT_PAGE_ERASE)), "z" ((uint16_t)(address)) ); }))
#define __boot_page_erase_extended(address)
Value:
(__extension__({ __asm__ __volatile__ ( "movw r30, %A3" "sts %1, %C3" "sts %0, %2" "spm" : : "i" (_SFR_MEM_ADDR(__SPM_REG)), "i" (_SFR_MEM_ADDR(RAMPZ)), "r" ((uint8_t)(__BOOT_PAGE_ERASE)), "r" ((uint32_t)(address)) : "r30", "r31" ); }))
#define __boot_page_erase_normal(address)
Value:
(__extension__({ __asm__ __volatile__ ( "sts %0, %1" "spm" : : "i" (_SFR_MEM_ADDR(__SPM_REG)), "r" ((uint8_t)(__BOOT_PAGE_ERASE)), "z" ((uint16_t)(address)) ); }))
#define __boot_page_fill_alternate(address, data)
Value:
(__extension__({ __asm__ __volatile__ ( "movw r0, %3" "sts %0, %1" "spm" ".word 0xffff" "nop" "clr r1" : : "i" (_SFR_MEM_ADDR(__SPM_REG)), "r" ((uint8_t)(__BOOT_PAGE_FILL)), "z" ((uint16_t)(address)), "r" ((uint16_t)(data)) : "r0" ); }))
#define __boot_page_fill_extended(address, data)
Value:
(__extension__({ __asm__ __volatile__ ( "movw r0, %4" "movw r30, %A3" "sts %1, %C3" "sts %0, %2" "spm" "clr r1" : : "i" (_SFR_MEM_ADDR(__SPM_REG)), "i" (_SFR_MEM_ADDR(RAMPZ)), "r" ((uint8_t)(__BOOT_PAGE_FILL)), "r" ((uint32_t)(address)), "r" ((uint16_t)(data)) : "r0", "r30", "r31" ); }))
#define __boot_page_fill_normal(address, data)
Value:
(__extension__({ __asm__ __volatile__ ( "movw r0, %3" "sts %0, %1" "spm" "clr r1" : : "i" (_SFR_MEM_ADDR(__SPM_REG)), "r" ((uint8_t)(__BOOT_PAGE_FILL)), "z" ((uint16_t)(address)), "r" ((uint16_t)(data)) : "r0" ); }))
#define __boot_page_write_alternate(address)
Value:
(__extension__({ __asm__ __volatile__ ( "sts %0, %1" "spm" ".word 0xffff" "nop" : : "i" (_SFR_MEM_ADDR(__SPM_REG)), "r" ((uint8_t)(__BOOT_PAGE_WRITE)), "z" ((uint16_t)(address)) ); }))
#define __boot_page_write_extended(address)
Value:
(__extension__({ __asm__ __volatile__ ( "movw r30, %A3" "sts %1, %C3" "sts %0, %2" "spm" : : "i" (_SFR_MEM_ADDR(__SPM_REG)), "i" (_SFR_MEM_ADDR(RAMPZ)), "r" ((uint8_t)(__BOOT_PAGE_WRITE)), "r" ((uint32_t)(address)) : "r30", "r31" ); }))
#define __boot_page_write_normal(address)
Value:
(__extension__({ __asm__ __volatile__ ( "sts %0, %1" "spm" : : "i" (_SFR_MEM_ADDR(__SPM_REG)), "r" ((uint8_t)(__BOOT_PAGE_WRITE)), "z" ((uint16_t)(address)) ); }))
#define __boot_rww_enable()
Value:
(__extension__({ __asm__ __volatile__ ( "sts %0, %1" "spm" : : "i" (_SFR_MEM_ADDR(__SPM_REG)), "r" ((uint8_t)(__BOOT_RWW_ENABLE)) ); }))
#define __boot_rww_enable_alternate()
Value:
(__extension__({ __asm__ __volatile__ ( "sts %0, %1" "spm" ".word 0xffff" "nop" : : "i" (_SFR_MEM_ADDR(__SPM_REG)), "r" ((uint8_t)(__BOOT_RWW_ENABLE)) ); }))
Author
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