NAME

       iicbus — I2C bus system

SYNOPSIS

       device iicbus
       device iicbb

       device iic
       device ic
       device iicsmb

DESCRIPTION

       The  iicbus system provides a uniform, modular and architecture-independent system for the implementation
       of drivers to control various I2C devices and to utilize different I2C controllers.

I2C

       I2C is an acronym for Inter Integrated Circuit bus.  The I2C bus was developed in  the  early  1980's  by
       Philips semiconductors.  Its purpose was to provide an easy way to connect a CPU to peripheral chips in a
       TV-set.

       The  BUS  physically  consists of 2 active wires and a ground connection.  The active wires, SDA and SCL,
       are both bidirectional.  Where SDA is the Serial DAta line and SCL is the Serial CLock line.

       Every component hooked up to the bus has its own unique address whether it is a CPU, LCD driver,  memory,
       or  complex function chip.  Each of these chips can act as a receiver and/or transmitter depending on its
       functionality.  Obviously an LCD driver is only a receiver, while a  memory  or  I/O  chip  can  both  be
       transmitter and receiver.  Furthermore there may be one or more BUS MASTERs.

       The  BUS  MASTER  is  the  chip issuing the commands on the BUS.  In the I2C protocol specification it is
       stated that the IC that initiates a data transfer on the bus is considered the BUS MASTER.  At that  time
       all the others are regarded to as the BUS SLAVEs.  As mentioned before, the IC bus is a Multi-MASTER BUS.
       This means that more than one IC capable of initiating data transfer can be connected to it.

DEVICES

       Some I2C device drivers are available:

       Devices           Description
       iic               general i/o operation
       ic                network IP interface
       iicsmb            I2C to SMB software bridge

INTERFACES

       The  I2C  protocol  may  be implemented by hardware or software.  Software interfaces rely on very simple
       hardware, usually two lines twiddled by 2  registers.   Hardware  interfaces  are  more  intelligent  and
       receive 8-bit characters they write to the bus according to the I2C protocol.

       I2C  interfaces  may  act on the bus as slave devices, allowing spontaneous bidirectional communications,
       thanks to the multi-master capabilities of the I2C protocol.

       Some I2C interfaces are available:

       Interface            Description
       pcf                  Philips PCF8584 master/slave interface
       iicbb                generic bit-banging master-only driver
       lpbb                 parallel port specific bit-banging interface
       bktr                 Brooktree848 video chipset, hardware and software master-only interface

SEE ALSO

       iicbb(4), lpbb(4), pcf(4)

HISTORY

       The iicbus manual page first appeared in FreeBSD 3.0.

AUTHORS

       This manual page was written by Nicolas Souchu.

Debian                                           August 6, 1998                                        IICBUS(4)