Provided by: libck-dev_0.7.1-13build1_amd64
NAME
ck_pr_fence_memory — enforce partial ordering of all memory operations
LIBRARY
Concurrency Kit (libck, -lck)
SYNOPSIS
#include <ck_pr.h> void ck_pr_fence_memory(); void ck_pr_fence_strict_memory();
DESCRIPTION
The ck_pr_fence_memory(3) function enforces the ordering of any memory operations with respect to the invocation of the function. This function always serves as an implicit compiler barrier. Achitectures implementing CK_MD_TSO do not emit a barrier, but compiler barrier semantics remain. Architectures implementing CK_MD_PSO and CK_MD_RMO always emit an instructions which provides the specified ordering guarantees. To force the unconditional emission of a memory fence, use ck_pr_fence_strict_memory().
EXAMPLE
#include <ck_pr.h> static int a = 0; static int b; static int c; static int d; void function(void) { int snapshot_a; ck_pr_store_int(&b, 1); snapshot_a = ck_pr_load_int(&a); /* * Make sure previous memory operations are * ordered with respect to memory operations * following the ck_pr_fence_memory. */ ck_pr_fence_memory(); ck_pr_store_int(&d, 3); ck_pr_store_int(&c, 2); return; }
RETURN VALUES
This function has no return value.
SEE ALSO
ck_pr_stall(3), ck_pr_fence_atomic(3), ck_pr_fence_atomic_store(3), ck_pr_fence_atomic_load(3), ck_pr_fence_load(3), ck_pr_fence_load_depends(3), ck_pr_fence_store(3), ck_pr_barrier(3), ck_pr_fas(3), ck_pr_load(3), ck_pr_store(3), ck_pr_faa(3), ck_pr_inc(3), ck_pr_dec(3), ck_pr_neg(3), ck_pr_not(3), ck_pr_add(3), ck_pr_sub(3), ck_pr_and(3), ck_pr_or(3), ck_pr_xor(3), ck_pr_cas(3), ck_pr_btc(3), ck_pr_bts(3), ck_pr_btr(3) Additional information available at http://concurrencykit.org/ April 7, 2013